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CMOS: Circuit Design, Layout, and Simulation, Revised, 2nd Edition
R. Jacob Baker,
Boise State University and Micron Technology, Inc.
ISBN: 978-0-470-22941-5
©2008
1072 pages
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Hallmark Features
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- The content of the second edition has been updated to reflect CMOS technology's movement into nanometer sizes.
- Discussions on phase-and delay-locked loops, mixed-signal circuits, data converters, and circuit noise
- More than 1,000 figures, 200 examples, and over 500 end-of-chapter problems
- In-depth coverage of both analog and digital circuit-level design techniques
- Real-world process parameters and design rules
- The book's website (cmosedu.com) provides examples, solutions, and SPICE simulation netlists.
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